1. Field of the Invention
The present invention relates to a piezoresistive device formed on a semiconductor substrate for use in an accelerometer, a pressure sensor or the like.
2. Description of the Background Art
Recently, there have been developed micro-miniature piezoresistive devices for use in detecting acceleration by sensing a minute stress variation or resistance variation due to piezoresistance effect of a semiconductor film formed on a semiconductor substrate.
Such piezoresistive devices are formed using a thin film technology, and hence they have the excellent features that they can be formed extremely small in size, for instance, with a length of approximately 100 .mu.m of a vibrating portion, a thickness of approximately 1 .mu.m, and an overall chip size of approximately 1 mm square, and in addition, that they can be formed on the same substrate along with other devices in an integrated circuit.
In one piezoresistive device, for example, a thin film resistor pattern of a p.sup.+ -type diffusion layer is formed on a surface of an n-type silicon semiconductor substrate. In this piezoresistive device, a leakage current is generated through a PN junction at a high temperature of more than 150.degree. C.
In order to overcome this problem, two solutions have been proposed.
In one solution, a polysilicon film is used as a pressure-sensitive resistor which is separated from a substrate by a silicon oxide film. In this case, no leakage current is generated between the resistor and the substrate even at the high temperature. However, in this structure, sensitivity is lowered. In order to improve this problem, a laser recrystalization technique has been used to produce large grains. However, in this case, gauge factors remain below 45.
In another solution, the SOI (silicon on insulator) technique is used. A method for producing a piezoresistive device using the SOI technique is shown in FIGS. 1a to 1e.
In FIG. 1a, a p.sup.+ -type diffusion layer 3 is formed on the surface of a second silicon semiconductor substrate 2, and a silicon oxide film 4 is formed in the surface area of a first silicon semiconductor substrate 1 separated from the second silicon semiconductor substrate 2.
In FIG. 1b, the second and first silicon semiconductor substrates 2 and 1 are electrostatically bonded so that the p.sup.+ -type diffusion layer 3 and the silicon oxide film 4 are directly contacted with each other.
In FIG. 1c, the second silicon semiconductor substrate 2 is removed by etching to expose the p.sup.+ -type diffusion layer 3.
In FIG. 1d, the p.sup.+ -type diffusion layer 3 is patterned to form piezoresistors on the silicon oxide film 4, and then the top of the resulting material is covered by silicon oxide film 5. A patterning of the silicon oxide film 5 is carried out to form electrodes 6 on the piezoresistors.
In FIG. 1e, a silicon oxide film 7 is formed on the back surface of the first silicon semiconductor substrate 1, and a back surface area 8 of the first silicon semiconductor substrate 1 is etched to form a diaphragm 9.
In this method, good electrical characteristics even at a high temperature of approximately 250.degree. C. and a high gauge factor are obtained. However, this method uses two silicon semiconductor substrates one of which is to be entirely removed by etching, and requires a complicated fabrication processing to invite a high cost.